1. Field
Example embodiments relate to a semiconductor package and a method of manufacturing the same. More particularly, example embodiments relate to a flip chip package including a semiconductor chip and a package substrate electrically connected with each other via conductive bumps, and a method of manufacturing the flip chip package.
2. Description of the Related Art
Generally, a plurality of semiconductor fabrication processes may be performed on a semiconductor substrate to form a plurality of semiconductor chips. In order to mount the semiconductor chips on a printed circuit board (PCB), a packaging process may be performed on the semiconductor chips to form semiconductor packages.
The semiconductor package may include a package substrate, a semiconductor chip mounted on the package substrate, and conductive connecting members for electrically connecting the semiconductor chip with the package substrate. The conductive connecting members may include conductive wires, conductive bumps, etc.
A semiconductor package including the conductive bumps may be referred to as a flip chip package. When flip chip packages having similar sizes may be stacked, semiconductor chips in the flip chip packages may be electrically connected with each other via conductive bumps and plugs. In contrast, when flip chip packages having different sizes may be stacked, an interposer chip may be interposed between semiconductor chips in the flip chip packages.
The plugs of the flip chip package may be arranged in the semiconductor chip. Because the semiconductor chip may include conductive silicon, an insulating layer may be formed on an inner surface of a plug hole to electrically isolate the plug from the semiconductor chip and the plugs from each other.
However, the insulating layer may not sufficiently insulate the plug from the semiconductor chip and the plugs from each other. Thus, signals transmitting through the plugs may be lost through the semiconductor chip and the adjacent plugs.
Further, when the interposer chip includes a conductive substrate, the above-mentioned problems may be generated in the interposer chip.